Jayesh Diwan

Jayesh Diwan

Educational Qualification

    MTech, BE

Research Area

    VLSI design, FPGA based Digital System Design

Department

  • Electronics & Communication

Guide

General Information

  • C403, Shree Hari Blessing, Near Achal Residency, New C G Road, Chandkheda, Ahmedabad - 382424

Specialisation

    Digital Logic Design , FPGA based Digital system Design

Get our Newsletter