Mr. Parthiv Bhau has been pursuing his PhD at the Institute of Technology, Nirma University, since October 2020. He is currently working as a Senior Research Fellow on a Ministry of Electronics and Information Technology (MeiTY) funded project titled "Secure and Energy Efficient Mixed Domain Compute in Memory-Based AI Accelerator Chip for Edge Applications." He obtained his BE degree in Electronics and Communication Engineering from Gandhinagar Institute of Technology, Gujarat University, in 2010. He completed his MTech (EC-Communication Systems Engineering) from Charusat University, Changa, in 2013. From 2013 to 2016, he worked as an Assistant Professor in the Department of Electronics and Communication Engineering at Amiraj College of Engineering and Technology. He then served as an Assistant Professor at the LJ Institute of Engineering and Technology from 2016 to 2018 and as a Design Engineer at Sankalp Semiconductor in physical design (ASIC) from 2018 to 2019. From 2019 to 2020, he was an Assistant Professor at Parul University. His research interests include VLSI design and physical design.
